Transmitting 8-bit bytes clocked at 100 MHz serially over fiber or backplane

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The easiest way that I know of to transmit serially a stream of 8-bit bytes clocked at 100 MHz. and recover the byte stream at the other end is to use the Cypress CYP15G0101DXB-BBXI  HOTLinkII transceiver.

http://www.cypress.com/?mpn=CYP15G0101DXB-BBXI

This chip converts a stream of bytes with a clock to a serial stream with Fiber Channel level 0 and 1 formatting.  In other words it does the 8 bit to 10 bit conversion producing a 50% duty cycle bit stream with special characters, providing LVPECL differential outputs.  The maximum byte rate is 150 million per second.

the differential LVPECL can be transmitted over boards and backplanes.  And it can be converted to/from fiber using standard fiber transceivers.

The chip has a receive section that reconstitutes the parallel byte stream.  This would be done at the other end using another of the these chips.

The receive section contains a FIFO for elasticity; this and control signals to and from the chip let you handle different clock domains betwee the transmitter and the receiver.

The second easiest way to do this may be to use an FPGA at each end, with Fibre Channel IP.  Generally the Fibre Channel IP, such as Altera’s  8B10B Encoder/Decoder MegaCore Function also handles the layer 0 and 1 protocols.  in other words it transmits bytes and the Fibre Channel special characters.  This will allow faster byte rates.  In fact many FPGA’s have hardware serdes’s, so using these will give very fast data rates.

The overall point is that we can use Fibre Channel protocol layers 0 and 1 for simple parallel data transmission purposes, while ignoring the higher-level Fibre Channel protocols.

 

Larry

 

 

 

 

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